JUNE 19–23, 2016

Session Details

Name: Hardware Prototyping: Developing Next-Gen HPC Architectures
Time: Thursday, June 23, 2016
02:00 pm - 06:00 pm
Room:   Ampere
Frankfurt Marriott Hotel
Breaks:04:00 pm - 04:30 pm Coffee Break
Organizer:   Filippo Mantovani, BSC
  Estela Suarez, JSC
Speaker:   Norbert Eicker, Bergische Universität Wuppertal & JSC
  Steve Furber, University of Manchester
  Toshihiro Hanawa, University of Tokyo
  Filippo Mantovani, BSC
  Tilo Wettig, University of Regensburg
Abstract:   The evolution curve of the computational power of supercomputers is getting flat and after hitting the frequency wall, we are facing a critical point for Moore’s law. For these reasons experimenting with novel architectures is a must. While the trend towards heterogeneous computing in the form of coprocessors, accelerators or on-chip helper cores is more evolutionary, revolutionary approaches like neuromorphic computing are in the limelight, as well. Their common goal is to increase performance while being energy efficienct. And they all strikingly demonstrate the drive for innovation in HPC – that needs to be demonstrated and proven with prototypes. We will cover a wide spectrum of architectural concepts, using various technologies, and addressing the requirements of user communities, either with general-purpose or domain specific approaches. A mix of invited talks and open discussion will deal in-depth with the ISC’16 focus on Exascale Architectures: Revolution vs. Evolution.

Targeted Audience
  • Members involved in hardware development and/or interested in learning about new architectural ideas
  • Software and application developers as active part of the co-design process
  • Young researchers
For more details, please visit the workshop webpage at http://www.deep-er.eu/press-corner/events/25-isc16-prototyping-workshop.html